M10=M10_0, TDMAE=TDMAE_0, RXEDGIE=RXEDGIE_0, MATCFG=MATCFG_0, SBNS=SBNS_0, RIDMAE=RIDMAE_0, MAEN1=MAEN1_0, RDMAE=RDMAE_0, OSR=OSR_0, BOTHEDGE=BOTHEDGE_0, RESYNCDIS=RESYNCDIS_0, LBKDIE=LBKDIE_0, MAEN2=MAEN2_0
LPUART Baud Rate Register
SBR | Baud Rate Modulo Divisor. |
SBNS | Stop Bit Number Select 0 (SBNS_0): One stop bit. 1 (SBNS_1): Two stop bits. |
RXEDGIE | RX Input Active Edge Interrupt Enable 0 (RXEDGIE_0): Hardware interrupts from STAT[RXEDGIF] are disabled. 1 (RXEDGIE_1): Hardware interrupt is requested when STAT[RXEDGIF] flag is 1. |
LBKDIE | LIN Break Detect Interrupt Enable 0 (LBKDIE_0): Hardware interrupts from STAT[LBKDIF] flag are disabled (use polling). 1 (LBKDIE_1): Hardware interrupt requested when STAT[LBKDIF] flag is 1. |
RESYNCDIS | Resynchronization Disable 0 (RESYNCDIS_0): Resynchronization during received data word is supported 1 (RESYNCDIS_1): Resynchronization during received data word is disabled |
BOTHEDGE | Both Edge Sampling 0 (BOTHEDGE_0): Receiver samples input data using the rising edge of the baud rate clock. 1 (BOTHEDGE_1): Receiver samples input data using the rising and falling edge of the baud rate clock. |
MATCFG | Match Configuration 0 (MATCFG_0): Address Match Wakeup 1 (MATCFG_1): Idle Match Wakeup 2 (MATCFG_2): Match On and Match Off 3 (MATCFG_3): Enables RWU on Data Match and Match On/Off for transmitter CTS input |
RIDMAE | Receiver Idle DMA Enable 0 (RIDMAE_0): DMA request disabled. 1 (RIDMAE_1): DMA request enabled. |
RDMAE | Receiver Full DMA Enable 0 (RDMAE_0): DMA request disabled. 1 (RDMAE_1): DMA request enabled. |
TDMAE | Transmitter DMA Enable 0 (TDMAE_0): DMA request disabled. 1 (TDMAE_1): DMA request enabled. |
OSR | Oversampling Ratio 0 (OSR_0): Writing 0 to this field will result in an oversampling ratio of 16 3 (OSR_3): Oversampling ratio of 4, requires BOTHEDGE to be set. 4 (OSR_4): Oversampling ratio of 5, requires BOTHEDGE to be set. 5 (OSR_5): Oversampling ratio of 6, requires BOTHEDGE to be set. 6 (OSR_6): Oversampling ratio of 7, requires BOTHEDGE to be set. 7 (OSR_7): Oversampling ratio of 8. 8 (OSR_8): Oversampling ratio of 9. 9 (OSR_9): Oversampling ratio of 10. 10 (OSR_10): Oversampling ratio of 11. 11 (OSR_11): Oversampling ratio of 12. 12 (OSR_12): Oversampling ratio of 13. 13 (OSR_13): Oversampling ratio of 14. 14 (OSR_14): Oversampling ratio of 15. 15 (OSR_15): Oversampling ratio of 16. 16 (OSR_16): Oversampling ratio of 17. 17 (OSR_17): Oversampling ratio of 18. 18 (OSR_18): Oversampling ratio of 19. 19 (OSR_19): Oversampling ratio of 20. 20 (OSR_20): Oversampling ratio of 21. 21 (OSR_21): Oversampling ratio of 22. 22 (OSR_22): Oversampling ratio of 23. 23 (OSR_23): Oversampling ratio of 24. 24 (OSR_24): Oversampling ratio of 25. 25 (OSR_25): Oversampling ratio of 26. 26 (OSR_26): Oversampling ratio of 27. 27 (OSR_27): Oversampling ratio of 28. 28 (OSR_28): Oversampling ratio of 29. 29 (OSR_29): Oversampling ratio of 30. 30 (OSR_30): Oversampling ratio of 31. 31 (OSR_31): Oversampling ratio of 32. |
M10 | 10-bit Mode select 0 (M10_0): Receiver and transmitter use 7-bit to 9-bit data characters. 1 (M10_1): Receiver and transmitter use 10-bit data characters. |
MAEN2 | Match Address Mode Enable 2 0 (MAEN2_0): Normal operation. 1 (MAEN2_1): Enables automatic address matching or data matching mode for MATCH[MA2]. |
MAEN1 | Match Address Mode Enable 1 0 (MAEN1_0): Normal operation. 1 (MAEN1_1): Enables automatic address matching or data matching mode for MATCH[MA1]. |